AMD

Artix-7 Field Programmable Gate Array (FPGA) IC 210 1843200 33280 324-LFBGA, CSPBGA

General Description

Xilinx® 7 series FPGAs comprise four FPGA families that address the complete range of system requirements, ranging from low cost, small form factor, 

cost-sensitive, high-volume applications to ultra high-end connectivity bandwidth, logic capacity, and signal processing capability for the most demanding 

high-performance applications. The 7 series FPGAs include:

• Spartan®-7 Family: Optimized for low cost, lowest power, and high I/O performance. Available in low-cost, very small form-factor 

packaging for smallest PCB footprint.

• Artix®-7 Family: Optimized for low power applications requiring serial transceivers and high DSP and logic throughput. Provides the lowest 

total bill of materials cost for high-throughput, cost-sensitive applications.

• Kintex®-7 Family: Optimized for best price-performance with a 2X improvement compared to previous generation, enabling a new class 

of FPGAs.

• Virtex®-7 Family: Optimized for highest system performance and capacity with a 2X improvement in system performance. Highest 

capability devices enabled by stacked silicon interconnect (SSI) technology.

Built on a state-of-the-art, high-performance, low-power (HPL), 28 nm, high-k metal gate (HKMG) process technology, 7 series FPGAs enable an 

unparalleled increase in system performance with 2.9 Tb/s of I/O bandwidth, 2 million logic cell capacity, and 5.3 TMAC/s DSP, while consuming 50% less 

power than previous generation devices to offer a fully programmable alternative to ASSPs and ASICs.

Summary of 7 Series FPGA Features

• Advanced high-performance FPGA logic based on real 6-input lookup table (LUT) technology configurable as distributed memory.

• 36 Kb dual-port block RAM with built-in FIFO logic for on-chip data buffering.

• High-performance SelectIO™ technology with support for DDR3 interfaces up to 1,866 Mb/s.

• High-speed serial connectivity with built-in multi-gigabit transceivers from 600 Mb/s to max. rates of 6.6 Gb/s up to 28.05 Gb/s, offering a 

special low-power mode, optimized for chip-to-chip interfaces.

• A user configurable analog interface (XADC), incorporating dual 12-bit 1MSPS analog-to-digital converters with on-chip thermal and 

supply sensors.

• DSP slices with 25 x 18 multiplier, 48-bit accumulator, and pre-adder for high-performance filtering, including optimized symmetric 

coefficient filtering.

• Powerful clock management tiles (CMT), combining phase-locked loop (PLL) and mixed-mode clock manager (MMCM) blocks for high 

precision and low jitter.

• Quickly deploy embedded processing with MicroBlaze™ processor.

• Integrated block for PCI Express® (PCIe), for up to x8 Gen3 Endpoint and Root Port designs.

• Wide variety of configuration options, including support for commodity memories, 256-bit AES encryption with HMAC/SHA-256 

authentication, and built-in SEU detection and correction.

• Low-cost, wire-bond, bare-die flip-chip, and high signal integrity flipchip packaging offering easy migration between family members in 

the same package. All packages available in Pb-free and selected packages in Pb option.

• Designed for high performance and lowest power with 28 nm, HKMG, HPL process, 1.0V core voltage process technology and 

0.9V core voltage option for even lower power

How to choose FPGA for your project?

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Virtex®-4 LX Field Programmable Gate Array (FPGA) IC 448 1769472 41472 668-BBGA, FCBGA

General Description

Combining Advanced Silicon Modular Block (ASMBL™) architecture with a wide variety of flexible features, the Virtex®-4

family from Xilinx greatly enhances programmable logic design capabilities, making it a powerful alternative to ASIC

technology. Virtex-4 FPGAs comprise three platform families-LX, FX, and SX-offering multiple feature choices and

combinations to address all complex applications. The wide array of Virtex-4 FPGA hard-IP core blocks includes the

PowerPC® processors (with a new APU interface)，tri-mode Ethernet MACs, 622 Mb/s to 6.5 Gb/s serial transceivers,

dedicated DSP slices, high-speed clock management circuitry, and source-synchronous interface blocks. The basic Virtex-4

FPGA building blocks are enhancements of those found in the popular Virtex, Virtex-E，Virtex-II，Virtex-ll Pro, and

Virtex-II Pro X product families, so previous-generation designs are upward compatible. Virtex-4 devices are produced on

a state-of-the-art 90 nm copper process using 300 mm (12-inch) wafer technology.

Features

• Three Families - LX/SX/FX

      Virtex-4 LX:High-performance logic applications solution

      Virtex-4 SX:High-performance solution for digital signal processing (DSP) applications

      Virtex-4 FX:High-performance, full-featured solution for embedded platform applications

• Xesium™ Clock Technology

      Digital clock manager (DCM) blocks

      Additional phase-matched clock dividers (PMCD)

      Differential global clocks

• XtremeDSPT™ Slice

      18 x 18, two's complement, signed Multiplier

      Optional pipeline stages

      Built-in Accumulator (48-bit)and Adder/Subtracter

• Smart RAM Memory Hierarchy

      Distributed RAM

      Dual-port 18-Kbit RAM blocks

            Optional pipeline stages

            Optional programmable FIFO logic automatically remaps RAM signals as FIFO signals

• High-speed memory interface supports DDR and DDR-2 SDRAM, QDR-II, and RLDRAM-II.

• SelectIOT™ Technology

      1.5V to 3.3V I/O operation

      Built-in ChipSync™ source-synchronous technology

      Digitally controlled impedance (DCI) active termination

      Fine grained I/Obanking (configuration in one bank)

• Flexible Logic Resources

• Secure Chip AES Bitstream Encryption 90 nm Copper CMOS Process 1.2V Core Voltage

• Flip-Chip Packaging including Pb-Free Package Choices

• RocketlOT™ 622 Mb/s to 6.5 Gb/s Multi-Gigabit Transceiver (MGT) [FX only]

• IBM PowerPC RISC Processor Core [FXonly]

      PowerPC 405(PPC405) Core

      Auxiliary Processor Unit Interface (User Coprocessor)

• Multiple Tri-Mode Ethernet MACs [FX only]

How to choose FPGA for your project?

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Spartan®-6 LXT Field Programmable Gate Array (FPGA) IC 250 958464 24051 484-BBGA

Spartan-6 FPGA Electrical Characteristics

Spartan®-6 LX and LXT FPGAs are available in various speed grades, with -3 having the highest performance. The DC and 

AC electrical parameters of the Automotive XA Spartan-6 FPGAs and Defense-grade Spartan-6Q FPGAs devices are 

equivalent to the commercial specifications except where noted. The timing characteristics of the commercial (XC) -2 speed 

grade industrial device are the same as for a -2 speed grade commercial device. The -2Q and -3Q speed grades are 

exclusively for the expanded (Q) temperature range. The timing characteristics are equivalent to those shown for the -2 and 

-3 speed grades for the Automotive and Defense-grade devices.

Spartan-6 FPGA DC and AC characteristics are specified for commercial (C), industrial (I), and expanded (Q) temperature 

ranges. Only selected speed grades and/or devices might be available in the industrial or expanded temperature ranges for 

Automotive and Defense-grade devices. References to device names refer to all available variations of that part number (for 

example, LX75 could denote XC6SLX75, XA6SLX75, or XQ6SLX75). The Spartan-6 FPGA -3N speed grade designates 

devices that do not support MCB functionality.

All supply voltage and junction temperature specifications are representative of worst-case conditions. The parameters 

included are common to popular designs and typical applications.

How to choose FPGA for your project?

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Artix-7 Field Programmable Gate Array (FPGA) IC 285 4976640 101440 484-BBGA

General Description

Xilinx® 7 series FPGAs comprise four FPGA families that address the complete range of system requirements, ranging from low cost, small form factor, 

cost-sensitive, high-volume applications to ultra high-end connectivity bandwidth, logic capacity, and signal processing capability for the most demanding 

high-performance applications. The 7 series FPGAs include:

• Spartan®-7 Family: Optimized for low cost, lowest power, and high I/O performance. Available in low-cost, very small form-factor 

packaging for smallest PCB footprint.

• Artix®-7 Family: Optimized for low power applications requiring serial transceivers and high DSP and logic throughput. Provides the lowest 

total bill of materials cost for high-throughput, cost-sensitive applications.

• Kintex®-7 Family: Optimized for best price-performance with a 2X improvement compared to previous generation, enabling a new class 

of FPGAs.

• Virtex®-7 Family: Optimized for highest system performance and capacity with a 2X improvement in system performance. Highest 

capability devices enabled by stacked silicon interconnect (SSI) technology.

Built on a state-of-the-art, high-performance, low-power (HPL), 28 nm, high-k metal gate (HKMG) process technology, 7 series FPGAs enable an 

unparalleled increase in system performance with 2.9 Tb/s of I/O bandwidth, 2 million logic cell capacity, and 5.3 TMAC/s DSP, while consuming 50% less 

power than previous generation devices to offer a fully programmable alternative to ASSPs and ASICs.

Summary of 7 Series FPGA Features

• Advanced high-performance FPGA logic based on real 6-input lookup table (LUT) technology configurable as distributed memory.

• 36 Kb dual-port block RAM with built-in FIFO logic for on-chip data buffering.

• High-performance SelectIO™ technology with support for DDR3 interfaces up to 1,866 Mb/s.

• High-speed serial connectivity with built-in multi-gigabit transceivers from 600 Mb/s to max. rates of 6.6 Gb/s up to 28.05 Gb/s, offering a 

special low-power mode, optimized for chip-to-chip interfaces.

• A user configurable analog interface (XADC), incorporating dual 12-bit 1MSPS analog-to-digital converters with on-chip thermal and 

supply sensors.

• DSP slices with 25 x 18 multiplier, 48-bit accumulator, and pre-adder for high-performance filtering, including optimized symmetric 

coefficient filtering.

• Powerful clock management tiles (CMT), combining phase-locked loop (PLL) and mixed-mode clock manager (MMCM) blocks for high 

precision and low jitter.

• Quickly deploy embedded processing with MicroBlaze™ processor.

• Integrated block for PCI Express® (PCIe), for up to x8 Gen3 Endpoint and Root Port designs.

• Wide variety of configuration options, including support for commodity memories, 256-bit AES encryption with HMAC/SHA-256 

authentication, and built-in SEU detection and correction.

• Low-cost, wire-bond, bare-die flip-chip, and high signal integrity flipchip packaging offering easy migration between family members in 

the same package. All packages available in Pb-free and selected packages in Pb option.

• Designed for high performance and lowest power with 28 nm, HKMG, HPL process, 1.0V core voltage process technology and 

0.9V core voltage option for even lower power.

How to choose FPGA for your project?

PDF