Freescale Semiconductor

CPU12 HC12 Microcontroller IC 16-Bit 8MHz 60KB (60K x 8) FLASH 80-QFP (14x14)

Introduction

The MC68HC912D60A microcontroller unit (MCU) is a 16-bit device

available in two package options, 80-pin QFP and 112-pin TQFP. Onchip

peripherals include a 16-bit central processing unit (CPU12), 60K

bytes of flash EEPROM, 2K bytes of RAM, 1K bytes of EEPROM, two

asynchronous serial communication interfaces (SCI), a serial peripheral

interface (SPI), an enhanced capture timer (ECT), two (one on 80QFP)

8-channel,10-bit analog-to-digital converters (ATD), a four-channel

pulse-width modulator (PWM), and a CAN 2.0 A, B software compatible

module (MSCAN12). System resource mapping, clock generation,

interrupt control and bus interfacing are managed by the lite integration

module (LIM). The MC68HC912D60A has full 16-bit data paths

throughout, however, the external bus can operate in an 8-bit narrow

mode so single 8-bit wide memory can be interfaced for lower cost

systems. The inclusion of a PLL circuit allows power consumption and

performance to be adjusted to suit operational requirements. In addition

to the I/O ports available in each module, 16 (2 on 80QFP) I/O port pins

are available with Key-Wake-Up capability from STOP or WAIT mode.

Features

• 16-bit CPU12

– Upward compatible with M68HC11 instruction set

– Interrupt stacking and programmer’s model identical to

M68HC11

– 20-bit ALU

– Instruction queue

– Enhanced indexed addressing

• Multiplexed bus

– Single chip or expanded

– 16 address/16 data wide or 16 address/8 data narrow mode

• Two 8-bit ports with key wake-up interrupt (2 pins only are

available on 80QFP) and one I2C start bit detector (112TQFP

only)

• Memory

– 60K byte flash EEPROM, made of a 28K module and a 32K

module with 8K bytes protected BOOT section in each module

(MC68HC912D60A)

– 1K byte EEPROM

– 2K byte RAM

• Analog-to-digital converters

– 2 x 8-channels, 10-bit resolution in 112TQFP

– 1 x 8-channels, 8-bit resolution in 80QFP

• 1M bit per second, CAN 2.0 A, B software compatible module

– Two receive and three transmit buffers

– Flexible identifier filter programmable as 2 x 32 bit, 4 x 16 bit or

8 x 8 bit

– Four separate interrupt channels for Rx, Tx, error and wake-up

– Low-pass filter wake-up function

– In 80QFP, only TxCAN and RxCAN pins are available

– Loop-back for self test operation

– Programmable link to a timer input capture channel, for timestamping

and network synchronization.

• Enhanced capture timer (ECT)

– 16-bit main counter with 7-bit prescaler

– 8 programmable input capture or output compare channels; 4

of the 8 input captures with buffer

– Input capture filters and buffers, three successive captures on

four channels, or two captures on four channels with a

capture/compare selectable on the remaining four

– Four 8-bit or two 16-bit pulse accumulators

– 16-bit modulus down-counter with 4-bit prescaler

– Four user-selectable delay counters for signal filtering

• 4 PWM channels with programmable period and duty cycle

– 8-bit 4-channel or 16-bit 2-channel

– Separate control for each pulse width and duty cycle

– Center- or left-aligned outputs

– Programmable clock select logic with a wide range of frequencies

• Serial interfaces

– Two asynchronous serial communications interfaces (SCI)

– MI-Bus implemented on final devices

– Synchronous serial peripheral interface (SPI)

• LIM (light integration module)

– WCR (windowed COP watchdog, real time interrupt, clock

monitor)

– ROC (reset and clocks)

– MEBI (multiplexed external bus interface)

– MBI (internal bus interface and map)

– INT (interrupt control)

• Clock generation

– Phase-locked loop clock frequency multiplier

– Limp home mode in absence of external clock

– Slow mode divider

– Low power 0.5 to 16 MHz crystal oscillator reference clock

– Option of a Pierce or Colpitts oscillator

• 112-Pin TQFP package or 80-pin QFP package

– Up to 68 general-purpose I/O lines, plus up to 18 input-only

lines in 112TQFP

or

Up to 48 general-purpose I/O lines, plus up to 10 input-only

lines in 80QFP

• 8MHz operation at 5V

• Development support

– Single-wire background debug™ mode (BDM)

– On-chip hardware breakpoints

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56800E 56F8xxx Microcontroller IC 16-Bit 60MHz 48KB (24K x 16) FLASH 64-LQFP (10x10)

MC56F825x/MC56F824xDigital Signal Controller

The MC56F825x/MC56F824x is a member of the 56800E core-based family of digital signal controllers (DSCs). It

combines, on a single chip, the processing power of a DSP and the functionality of a microcontroller with a flexible set of

peripherals to create a cost-effective solution. Because of its low cost, configuration flexibility, and compact program

code, it is well-suited for many applications. The

MC56F825x/MC56F824x includes many peripherals that are especially useful for cost-sensitive applications, including:

• Industrial control

• Home appliances

• Smart sensors

• Fire and security systems

• Solar inverters

• Battery chargers and management

• Switched-mode power supplies and power management

• Power metering

• Motor control (ACIM, BLDC, PMSM, SR, and stepper)

• Handheld power tools

• Arc detection

• Medical devices/equipment

• Instrumentation

• Lighting ballast

The 56800E core is based on a modified Harvard-style architecture consisting of three execution units operating in

parallel, allowing as many as six operations per instruction cycle. The MCU-style programming model and optimized

instruction set allow straightforward generation of efficient, compact DSP and control code. The instruction set is also

highly efficient for C compilers to enable rapid development of optimized control applications.

The MC56F825x/MC56F824x supports program execution from internal memories. Two data operands per instruction

cycle can be accessed from the on-chip data RAM. A full set of programmable peripherals supports various applications.

Each peripheral can be independently shut down to save power. Any pin, except Power pins and the Reset pin, can also

be configured as General Purpose Input/Outputs (GPIOs)

On-chip features include:

• 60 MHz operation frequency

• DSP and MCU functionality in a unified, C-efficient architecture

• On-chip memory

– 56F8245/46: 48 KB (24K x 16) flash memory; 6 KB

(3K x 16) unified data/program RAM

– 56F8247: 48 KB (24K x 16) flash memory; 8 KB

(4K x 16) unified data/program RAM

– 56F8255/56/57: 64 KB (32K x 16) flash memory; 8 KB

(4K x 16) unified data/program RAM

• eFlexPWM with up to 9 channels, including 6 channels

with high (520 ps) resolution NanoEdge placement

• Two 8-channel, 12-bit analog-to-digital converters (ADCs)

with dynamic x2 and x4 programmable amplifier,

conversion time as short as 600 ns, and input

current-injection protection

• Three analog comparators with integrated 5-bit DAC references

• Cyclic Redundancy Check (CRC) Generator

• Two high-speed queued serial communication interface

(QSCI) modules with LIN slave functionality

• Queued serial peripheral interface (QSPI) module

• Two SMBus-compatible inter-integrated circuit (I2C) ports

• Freescale’s scalable controller area network (MSCAN) 2.0 A/B module

• Two 16-bit quad timers (2 x 4 16-bit timers)

• Computer operating properly (COP) watchdog module

• On-chip relaxation oscillator: 8 MHz (400 kHz at standby mode)

• Crystal/resonator oscillator

• Integrated power-on reset (POR) and low-voltage interrupt

(LVI) and brown-out reset module

• Inter-module crossbar connection

• Up to 54 GPIOs

• 44-pin LQFP, 48-pin LQFP, and 64-pin LQFP packages

• Single supply: 3.0 V to 3.6 V

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