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S12Z S12 MagniV Microcontroller IC 16-Bit 32MHz 32KB (32K x 8) FLASH 48-LQFP (7x7)

Introduction

The MC9S12ZVM-Family is an automotive 16-bit microcontroller family using the NVM + UHV

technology that offers the capability to integrate 40 V analog components. This family reuses many

features from the existing S12/S12X portfolio. The particular differentiating features of this family are the

enhanced S12Z core, the combination of dual-ADC synchronized with PWM generation and the

integration of “high-voltage” analog modules, including the voltage regulator (VREG), Gate Drive Unit

(GDU) and a Local Interconnect Network (LIN) physical layer. These features enable a fully integrated

single chip solution to drive up to 6 external power MOSFETs for BLDC or PMSM motor drive

applications.

The MC9S12ZVM-Family includes error correction code (ECC) on RAM and flash memory, EEPROM

for diagnostic or data storage, a fast analog-to-digital converter (ADC) and a frequency modulated phase

locked loop (IPLL) that improves the EMC performance. The MC9S12ZVM-Family delivers an

optimized solution with the integration of several key system components into a single device, optimizing

system architecture and achieving significant space savings. The MC9S12ZVM-Family delivers all the

advantages and efficiencies of a 16-bit MCU while retaining the low cost, power consumption, EMC, and

code-size efficiency advantages currently enjoyed by users of existing S12(X) families. The

MC9S12ZVM-Family is available in different pin-out options, using the 64-pin LQFP-EP and 48-pin

LQFP-EP packages to accommodate LIN, CAN and external PWM based application interfaces. In

addition to the I/O ports available in each module, further I/O ports are available with interrupt capability

allowing wake-up from stop or wait modes.

The MC9S12ZVM-Family is a general-purpose family of devices suitable for a range of applications,

including:

• 3-phase sensorless BLDC motor control for

— Fuel pump

— Water pump

— Oil pump

— A/C compressor

— HVAC blower

— Engine cooling fan

— Electric vehicle battery cooling fan

• Brush DC motor control requiring driving in 2 directions, along with PWM control for

— Reversible wiper

— Trunk opener

Chip-Level Features

On-chip modules available within the family include the following features:

• S12Z CPU core

• 128, 64, 32 or 16KB on-chip flash with ECC

• 512 or128 byte EEPROM with ECC

• 8, 4 or 2 KB on-chip SRAM with ECC

• Phase locked loop (IPLL) frequency multiplier with internal filter

• 1 MHz internal RC oscillator with +/-1.3% accuracy over rated temperature range

• 4-20MHz amplitude controlled pierce oscillator

• Internal COP (watchdog) module

• 6-channel, 15-bit pulse width modulator with fault protection (PMF) 

• Low side and high side FET pre-drivers for each phase

— Gate drive pre-regulator

— LDO (Low Dropout Voltage Regulator) (typically 11V)

— High side gate supply generated using bootstrap circuit with external diode and capacitor

— Sustaining charge pump with two external capacitors and diodes

— High side drain (HD) monitoring on internal ADC channel using HD/5 voltage

• Two parallel analog-to-digital converters (ADC) with 12-bit resolution and up to 9 channels

available on external pins

• Programmable Trigger Unit (PTU) for synchronization of PMF and ADC

• One serial peripheral interface (SPI) module

• One serial communication interface (SCI) module with interface to internal LIN physical layer

transceiver (with RX connected to a timer channel for frequency calibration purposes, if desired)

• Up to one additional SCI (not connected to LIN physical layer)

• On-chip LIN physical layer transceiver fully compliant with the LIN 2.2 standard

(S12ZVML versions)

• One High Voltage physical interface. (S12ZVM32, S12ZVM16 versions only)

• 4-channel timer module (TIM) with input capture/output compare

• MSCAN (1 Mbit/s, CAN 2.0 A, B software compatible) module

• On-chip voltage regulator (VREG) for regulation of input supply and all internal voltages

— Optional VREG ballast control output to supply an external CAN physical layer

• Two current sense circuits for overcurrent detection or torque measurement

• Autonomous periodic interrupt (API)

• 20mA high-current output for use as Hall sensor supply

• Supply voltage sense with low battery warning

• Chip temperature sensor

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HCS12 HCS12 Microcontroller IC 16-Bit 25MHz 32KB (32K x 8) FLASH 80-QFP (14x14)

MC9S12DJ64

Covers also

MC9S12D64, MC9S12A64, 

MC9S12D32,MC9S12A32

Overview

The MC9S12DJ64 microcontroller unit (MCU) is a 16-bit device composed of standard on-chip

peripherals including a 16-bit central processing unit (HCS12 CPU), 64K bytes of Flash EEPROM, 4K

bytes of RAM, 1K bytes of EEPROM, two asynchronous serial communications interfaces (SCI), one

serial peripheral interfaces (SPI), an 8-channel IC/OC enhanced capture timer, two 8-channel, 10-bit

analog-to-digital converters (ADC), an 8-channel pulse-width modulator (PWM), a digital Byte Data Link

Controller (BDLC), 29 discrete digital I/O channels (Port A, Port B, Port K and Port E), 20 discrete digital

I/O lines with interrupt and wakeup capability, a CAN 2.0 A, B software compatible modules

(MSCAN12), and an Inter-IC Bus. The MC9S12DJ64 has full 16-bit data paths throughout. However, the

external bus can operate in an 8-bit narrow mode so single 8-bit wide memory can be interfaced for lower

cost systems. The inclusion of a PLL circuit allows power consumption and performance to be adjusted to

suit operational requirements.

Features

• HCS12 Core

– 16-bit HCS12 CPU

i. Upward compatible with M68HC11 instruction set

ii. Interrupt stacking and programmer’s model identical to M68HC11

iii.Instruction queue

iv. Enhanced indexed addressing

– MEBI (Multiplexed External Bus Interface)

– MMC (Module Mapping Control)

– INT (Interrupt control)

– BKP (Breakpoints)

– BDM (Background Debug Mode)

• CRG (low current Colpitts or Pierce oscillator, PLL, reset, clocks, COP watchdog, real time

interrupt, clock monitor)

• 8-bit and 4-bit ports with interrupt functionality

– Digital filtering

– Programmable rising or falling edge trigger

• Memory

– 64K Flash EEPROM

– 1K byte EEPROM

– 4K byte RAM

• Two 8-channel Analog-to-Digital Converters

– 10-bit resolution

– External conversion trigger capability

• 1M bit per second, CAN 2.0 A, B software compatible module

– Five receive and three transmit buffers

– Flexible identifier filter programmable as 2 x 32 bit, 4 x 16 bit or 8 x 8 bit

– Four separate interrupt channels for Rx, Tx, error and wake-up

– Low-pass filter wake-up function

– Loop-back for self test operation

• Enhanced Capture Timer

– 16-bit main counter with 7-bit prescaler

– 8 programmable input capture or output compare channels

– Four 8-bit or two 16-bit pulse accumulators

• 8 PWM channels

– Programmable period and duty cycle

– 8-bit 8-channel or 16-bit 4-channel

– Separate control for each pulse width and duty cycle

– Center-aligned or left-aligned outputs

– Programmable clock select logic with a wide range of frequencies

– Fast emergency shutdown input

– Usable as interrupt inputs

• Serial interfaces

– Two asynchronous Serial Communications Interfaces (SCI)

– Synchronous Serial Peripheral Interface (SPI)

• Byte Data Link Controller (BDLC)

– SAE J1850 Class B Data Communications Network Interface Compatible and ISO Compatible

for Low-Speed (<125 Kbps) Serial Data Communications in Automotive Applications

• Inter-IC Bus (IIC)

– Compatible with I2C Bus standard

– Multi-master operation

– Software programmable for one of 256 different serial clock frequencies

• 112-Pin LQFP or 80 QFP package

– I/O lines with 5V input and drive capability

– 5V A/D converter inputs

– Operation at 50MHz equivalent to 25MHz Bus Speed

– Development support

– Single-wire background debug™ mode (BDM)

– On-chip hardware breakpoints

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12V1 HCS12 Microcontroller IC 16-Bit 25MHz 128KB (128K x 8) FLASH 48-LQFP (7x7)

Introduction

The MC9S12G-Family is an optimized, automotive, 16-bit microcontroller product line focused on

low-cost, high-performance, and low pin-count. This family is intended to bridge between high-end 8-bit

microcontrollers and high-performance 16-bit microcontrollers, such as the MC9S12XS-Family. The

MC9S12G-Family is targeted at generic automotive applications requiring CAN or LIN/J2602

communication. Typical examples of these applications include body controllers, occupant detection, door

modules, seat controllers, RKE receivers, smart actuators, lighting modules, and smart junction boxes.

The MC9S12G-Family uses many of the same features found on the MC9S12XS- and MC9S12P-Family,

including error correction code (ECC) on flash memory, a fast analog-to-digital converter (ADC) and a

frequency modulated phase locked loop (IPLL) that improves the EMC performance. 

The MC9S12G-Family is optimized for lower program memory sizes down to 16k. In order to simplify

customer use it features an EEPROM with a small 4 bytes erase sector size.

The MC9S12G-Family deliver all the advantages and efficiencies of a 16-bit MCU while retaining the low

cost, power consumption, EMC, and code-size efficiency advantages currently enjoyed by users of NXP’s

existing 8-bit and 16-bit MCU families. Like the MC9S12XS-Family, the MC9S12G-Family run 16-bit

wide accesses without wait states for all peripherals and memories. The MC9S12G-Family is available in

100-pin LQFP, 64-pin LQFP, 48-pin LQFP/QFN, 32-pin LQFP and 20-pin TSSOP package options and

aims to maximize the amount of functionality especially for the lower pin count packages. In addition to

the I/O ports available in each module, further I/O ports are available with interrupt capability allowing

wake-up from stop or wait modes.

Chip-Level Features

On-chip modules available within the family include the following features:

• S12 CPU core

• Up to 240 Kbyte on-chip flash with ECC

• Up to 4 Kbyte EEPROM with ECC

• Up to 11 Kbyte on-chip SRAM

• Phase locked loop (IPLL) frequency multiplier with internal filter

• 4–16 MHz amplitude controlled Pierce oscillator

• 1 MHz internal RC oscillator

• Timer module (TIM) supporting up to eight channels that provide a range of 16-bit input capture,

output compare, counter, and pulse accumulator functions

• Pulse width modulation (PWM) module with up to eight x 8-bit channels

• Up to 16-channel, 10 or 12-bit resolution successive approximation analog-to-digital converter

(ADC)

• Up to two 8-bit digital-to-analog converters (DAC)

• Up to one 5V analog comparator (ACMP)

• Up to three serial peripheral interface (SPI) modules

• Up to three serial communication interface (SCI) modules supporting LIN communications

• Up to one multi-scalable controller area network (MSCAN) module (supporting CAN protocol

2.0A/B)

• On-chip voltage regulator (VREG) for regulation of input supply and all internal voltages

• Autonomous periodic interrupt (API)

• Precision fixed voltage reference for ADC conversions

• Optional reference voltage attenuator module to increase ADC accuracy

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12V1 S12 MagniV Microcontroller IC 16-Bit 25MHz 48KB (48K x 8) FLASH 32-LQFP (7x7)

Introduction

The MC9S12VR-Family is an optimized automotive 16-bit microcontroller product line focused on

low-cost, high-performance, and low pin-count. This family integrates an S12 microcontroller with a LIN

Physical interface, a 5V regulator system to supply the microcontroller, and analog blocks to control other

elements of the system which operate at vehicle battery level (e.g. relay drivers, high-side driver outputs,

wake up inputs). The MC9S12VR-Family is targeted at generic automotive applications requiring single

node LIN communications. Typical examples of these applications include window lift modules, seat

modules and sun-roof modules to name a few.

The MC9S12VR-Family uses many of the same features found on the MC9S12G family, including error

correction code (ECC) on flash memory, EEPROM for diagnostic or data storage, a fast analog-to-digital

converter (ADC) and a frequency modulated phase locked loop (IPLL) that improves the EMC

performance. The MC9S12VR-Family delivers an optimized solution with the integration of several key

system components into a single device, optimizing system architecture and achieving significant space

savings. The MC9S12VR-Family delivers all the advantages and efficiencies of a 16-bit MCU while

retaining the low cost, power consumption, EMC, and code-size efficiency advantages currently enjoyed

by users of Freescale’s existing 8-bit and 16-bit MCU families. Like theMC9S12XS family, the

MC9S12VR-Family will run 16-bit wide accesses without wait states for all peripherals and memories.

Misaligned single cycle 16 bit RAM access is not supported. TheMC9S12VR-Family will be available in

32-pin and 48-pin LQFP. In addition to the I/O ports available in each module, further I/O ports are

available with interrupt capability allowing wake-up from stop or wait modes.

Chip-Level Features

·On-chip modules available within the family include the following features:

·HCS12 CPU core

·64 or 48 Kbyte on-chip flash with ECC

·512 byte EEPROM with ECC

·2 Kbyte on-chip SRAM

·Phase locked loop (IPLL) frequency multiplier with internal filter

·1 MHz internal RC oscillator with +/-1.3% accuracy over rated temperature range

·4-16MHz amplitude controlled pierce oscillator

·Internal COP (watchdog) module (with separate clock source)

·Timer module (TIM) supporting input/output channels that provide a range of 16-bit input capture,

output compare and counter (up to 4 channels)

·Pulse width modulation (PWM) module (up to 8 x 8-bit channels)

.10-bit resolution successive approximation analog-to-digital converter (ADC) with up to 6

channels available on external pins

·One serial peripheral interface (SPI) module

·One serial communication interface (SCI) module supporting LINcommunications (with RX

connected to a timer channel for internal oscillator calibration purposes, if desired)

·Up to one additional SCI (not connected to LIN physical layer)

·One on-chip LIN physical layer transceiver fully compliant with the LIN2.1 standard

·On-chip voltage regulator(VREG) for regulation of input supply and all internal voltages

·Autonomous periodic interrupt(API) (combination with cyclic, watchdog)

·Two protected low-side outputs to drive inductive loads

·Up to two protected high-side outputs

·4 high-voltage inputs with wake-up capability and readable internally on ADC

·Up to two 10mA high-current outputs

·20mA high-current output for use as Hall sensor supply

·Battery voltage sense with low battery warning, internally reverse battery protected

·Chip temperature sensor