NXP USA Inc.

HCS12 HCS12 Microcontroller IC 16-Bit 32MHz 96KB (96K x 8) FLASH 64-LQFP (10x10)

MC9S12P128

Covers also MC9S12P-Family

MC9S12P96

MC9S12P64

MC9S12P32

Introduction

The MC9S12P family is an optimized, automotive, 16-bit microcontroller product line focused on lowcost,

high-performance, and low pin-count. This family is intended to bridge between high-end 8-bit

microcontrollers and high-performance 16-bit microcontrollers, such as the MC9S12XS family. The

MC9S12P family is targeted at generic automotive applications requiring CAN or LIN/J2602

communication. Typical examples of these applications include body controllers, occupant detection, door

modules, seat controllers, RKE receivers, smart actuators, lighting modules, and smart junction boxes.

The MC9S12P family uses many of the same features found on the MC9S12XS family, including error

correction code (ECC) on flash memory, a separate data-flash module for diagnostic or data storage, a fast

analog-to-digital converter (ATD) and a frequency modulated phase locked loop (IPLL) that improves the

EMC performance.

The MC9S12P family deliver all the advantages and efficiencies of a 16-bit MCU while retaining the low

cost, power consumption, EMC, and code-size efficiency advantages currently enjoyed by users of

Freescale’s existing 8-bit and 16-bit MCU families. Like the MC9S12XS family, the MC9S12P family run

16-bit wide accesses without wait states for all peripherals and memories. The MC9S12P family is

available in 80-pin QFP, 64-pin LQFP, and 48-pin QFN package options and aims to maximize pin

compatibility with the MC9S12XS family. In addition to the I/O ports available in each module, further

I/O ports are available with interrupt capability allowing wake-up from stop or wait modes.

Chip-Level Features

On-chip modules available within the family include the following features:

• S12 CPU core

• Up to 128 Kbyte on-chip flash with ECC

• 4 Kbyte data flash with ECC

• Up to 6 Kbyte on-chip SRAM

• Phase locked loop (IPLL) frequency multiplier with internal filter

• 4–16 MHz amplitude controlled Pierce oscillator

• 1 MHz internal RC oscillator

• Timer module (TIM) supporting input/output channels that provide a range of 16-bit input capture,

output compare, counter, and pulse accumulator functions

• Pulse width modulation (PWM) module with 6 x 8-bit channels

• 10-channel, 12-bit resolution successive approximation analog-to-digital converter (ATD)

• One serial peripheral interface (SPI) module

• One serial communication interface (SCI) module supporting LIN communications

• One multi-scalable controller area network (MSCAN) module (supporting CAN protocol 2.0A/B)

• On-chip voltage regulator (VREG) for regulation of input supply and all internal voltages

• Autonomous periodic interrupt (API)

How read the label of the NXP chip？What is the naming rules of NXP microcontrollers?

NXP Electronics components unboxing，humidity card changed color chip can used？

HCS12 HCS12 Microcontroller IC 16-Bit 25MHz 128KB (128K x 8) FLASH 112-LQFP (20x20)

MC9S12DT128

Covers MC9S12DT128E, MC9S12DG128E,

MC9S12DJ128E, MC9S12DG128, MC9S12DJ128,

MC9S12DB128, MC9S12A128, SC515846, SC515847,

SC515848, SC515849, SC101161DT, SC101161DG,

SC101161DJ, SC102202, SC102203, SC102204,

SC102205

Overview

The MC9S12DT128 microcontroller unit (MCU) is a 16-bit device composed of standard on-chip

peripherals including a 16-bit central processing unit (HCS12 CPU), 128K bytes of Flash EEPROM, 8K

bytes of RAM, 2K bytes of EEPROM, two asynchronous serial communications interfaces (SCI), two

serial peripheral interfaces (SPI), an 8-channel IC/OC enhanced capture timer, two 8-channel, 10-bit

analog-to-digital converters (ADC), an 8-channel pulse-width modulator (PWM), a digital Byte Data Link

Controller (BDLC), 29 discrete digital I/O channels (Port A, Port B, Port K and Port E), 20 discrete digital

I/O lines with interrupt and wakeup capability, three CAN 2.0 A, B software compatible modules

(MSCAN12), a Byteflight module and an Inter-IC Bus. The MC9S12DT128 has full 16-bit data paths

throughout. However, the external bus can operate in an 8-bit narrow mode so single 8-bit wide memory

can be interfaced for lower cost systems. The inclusion of a PLL circuit allows power consumption and

performance to be adjusted to suit operational requirements.

Features

• HCS12 Core

– 16-bit HCS12 CPU

i. Upward compatible with M68HC11 instruction set

ii. Interrupt stacking and programmer’s model identical to M68HC11

iii.20-bit ALU

iv. Instruction queue

v. Enhanced indexed addressing

– MEBI (Multiplexed External Bus Interface)

– MMC (Module Mapping Control)

– INT (Interrupt control)

– BKP (Breakpoints)

– BDM (Background Debug Module)

• CRG (Clock and Reset Generator)

– Choice of low current Colpitts oscillator or standard Pierce Oscillator

– PLL

– COP watchdog

– real time interrupt

– clock monitor

• 8-bit and 4-bit ports with interrupt functionality

– Digital filtering

– Programmable rising or falling edge trigger

• Memory

– 128K Flash EEPROM

– 2K byte EEPROM

– 8K byte RAM

• Two 8-channel Analog-to-Digital Converters

– 10-bit resolution

– External conversion trigger capability

• Three 1M bit per second, CAN 2.0 A, B software compatible modules

– Five receive and three transmit buffers

– Flexible identifier filter programmable as 2 x 32 bit, 4 x 16 bit or 8 x 8 bit

– Four separate interrupt channels for Rx, Tx, error and wake-up

– Low-pass filter wake-up function

– Loop-back for self test operation

• Enhanced Capture Timer

– 16-bit main counter with 7-bit prescaler

– 8 programmable input capture or output compare channels

– Four 8-bit or two 16-bit pulse accumulators

• 8 PWM channels

– Programmable period and duty cycle

– 8-bit 8-channel or 16-bit 4-channel

– Separate control for each pulse width and duty cycle

– Center-aligned or left-aligned outputs

– Programmable clock select logic with a wide range of frequencies

– Fast emergency shutdown input

– Usable as interrupt inputs

• Serial interfaces

– Two asynchronous Serial Communications Interfaces (SCI)

– Two Synchronous Serial Peripheral Interface (SPI)

– Byteflight

• Byte Data Link Controller (BDLC)

• SAE J1850 Class B Data Communications Network Interface

– Compatible and ISO Compatible for Low-Speed (<125 Kbps) Serial Data Communications in

Automotive Applications

• Inter-IC Bus (IIC)

– Compatible with I2C Bus standard

– Multi-master operation

– Software programmable for one of 256 different serial clock frequencies

• 112-Pin LQFP and 80-Pin QFP package options

– I/O lines with 5V input and drive capability

– 5V A/D converter inputs

– Operation at 50MHz equivalent to 25MHz Bus Speed

– Development support

– Single-wire background debug™ mode

– On-chip hardware breakpoints

How read the label of the NXP chip？What is the naming rules of NXP microcontrollers?

12V1 HCS12 Microcontroller IC 16-Bit 25MHz 128KB (128K x 8) FLASH 64-LQFP (10x10)

Introduction

The MC9S12G-Family is an optimized, automotive, 16-bit microcontroller product line focused on

low-cost, high-performance, and low pin-count. This family is intended to bridge between high-end 8-bit

microcontrollers and high-performance 16-bit microcontrollers, such as the MC9S12XS-Family. The

MC9S12G-Family is targeted at generic automotive applications requiring CAN or LIN/J2602

communication. Typical examples of these applications include body controllers, occupant detection, door

modules, seat controllers, RKE receivers, smart actuators, lighting modules, and smart junction boxes.

The MC9S12G-Family uses many of the same features found on the MC9S12XS- and MC9S12P-Family,

including error correction code (ECC) on flash memory, a fast analog-to-digital converter (ADC) and a

frequency modulated phase locked loop (IPLL) that improves the EMC performance. 

The MC9S12G-Family is optimized for lower program memory sizes down to 16k. In order to simplify

customer use it features an EEPROM with a small 4 bytes erase sector size.

The MC9S12G-Family deliver all the advantages and efficiencies of a 16-bit MCU while retaining the low

cost, power consumption, EMC, and code-size efficiency advantages currently enjoyed by users of NXP’s

existing 8-bit and 16-bit MCU families. Like the MC9S12XS-Family, the MC9S12G-Family run 16-bit

wide accesses without wait states for all peripherals and memories. The MC9S12G-Family is available in

100-pin LQFP, 64-pin LQFP, 48-pin LQFP/QFN, 32-pin LQFP and 20-pin TSSOP package options and

aims to maximize the amount of functionality especially for the lower pin count packages. In addition to

the I/O ports available in each module, further I/O ports are available with interrupt capability allowing

wake-up from stop or wait modes.

Chip-Level Features

On-chip modules available within the family include the following features:

• S12 CPU core

• Up to 240 Kbyte on-chip flash with ECC

• Up to 4 Kbyte EEPROM with ECC

• Up to 11 Kbyte on-chip SRAM

• Phase locked loop (IPLL) frequency multiplier with internal filter

• 4–16 MHz amplitude controlled Pierce oscillator

• 1 MHz internal RC oscillator

• Timer module (TIM) supporting up to eight channels that provide a range of 16-bit input capture,

output compare, counter, and pulse accumulator functions

• Pulse width modulation (PWM) module with up to eight x 8-bit channels

• Up to 16-channel, 10 or 12-bit resolution successive approximation analog-to-digital converter

(ADC)

• Up to two 8-bit digital-to-analog converters (DAC)

• Up to one 5V analog comparator (ACMP)

• Up to three serial peripheral interface (SPI) modules

• Up to three serial communication interface (SCI) modules supporting LIN communications

• Up to one multi-scalable controller area network (MSCAN) module (supporting CAN protocol

2.0A/B)

• On-chip voltage regulator (VREG) for regulation of input supply and all internal voltages

• Autonomous periodic interrupt (API)

• Precision fixed voltage reference for ADC conversions

• Optional reference voltage attenuator module to increase ADC accuracy