S12Z S12 MagniV Microcontroller IC 16-Bit 32MHz 32KB (32K x 8) FLASH 32-HVQFN (5x5)

Introduction

The MC9S12ZVL-Family is an automotive 16-bit microcontroller family using the 180nm NVM+UHV

technology that offers the capability to integrate 40V analog components. This family reuses many

features from the existing S12 portfolio. The particular differentiating features of this family are the

enhanced S12Z core and the integration of“high-voltage”analog modules, including the voltage regulator

(VREG) and a Local Interconnect Network (LIN) physical layer.

The MC9S12ZVL-Family includes error correction code (ECC) on RAM, FLASH and EEPROM for

diagnostic or data storage, a fast analog-to-digital converter (ADC) and a frequency modulated phase

locked loop (IPLL) that improves the EMC performance. The MC9S12ZVL-Family delivers an optimized

solution with the integration of several key system components into a single device, optimizing system

architecture and achieving significant space savings.TheMC9S12ZVL-Family delivers all the advantages

and efficiencies ofa 16-bit MCU while retaining the low cost, power consumption, EMC, and code-size

efficiency advantages currently enjoyed by users of existing S12 families. The MC9S12ZVL-Family is

available in 48-pin, 32-pin LQFPand 32-pin QFN-EP. In addition to the I/O ports available in each

module, further I/O ports are available with interrupt capability allowing wake-up from stop or wait

modes.

The MC9S12ZVL-Family is a general-purpose family of devices suitable for a wide range of applications.

The MC9S12ZVL-Family is targeted at generic automotive applications requiring LIN connectivity.

Typical examples of these applications include switch panels and body endpoints for sensors.

Chip-Level Features

On-chip modules available within the family include the following features:

·S12Z CPU core

·128, 96, 64, 32, 16 or 8 KB on-chip flash with ECC

·2048,1024, 128 byte EEPROM with ECC

·8192, 4096, 1024 or 512 byte on-chip SRAM with ECC

·Phase locked loop (IPLL) frequency multiplier with internal filter

·1MHz internal RC oscillator with+/-1.3% accuracy over rated temperature range

·4-20 MHz amplitude controlled pierce oscillator

·Internal COP (watchdog) module

·analog-to-digital converter (ADC) with 10-bit or 12-bit resolution and up to 10 channels available

on external pins and Vbg(bandgap) result reference

·PGA module with two input channels

·One 8-bit 5V digital-to-analog converter (DAC)

·One analog comparators (ACMP) with rail-to-rail inputs

·MSCAN (1 Mbit/s, CAN 2.0 A, B software compatible) module

·One serial peripheral interface (SPI) module

·One serial communication interface (SCI) module with interface to internal LIN physical layer

transceiver (with RX connected to a timer channel for frequency calibration purposes, if desired)

·Up to one additional SCI (not connected to LIN physical layer)

·One on-chip LIN physical layer transceiver fully compliant with the LIN 2.2 standard

·6-channel timer module (TIM0) with input capture/output compare

·2-channel timer module (TIM1) with input capture/output compare

·Inter-IC (IIC) module

·8-channel Pulse Width Modulation module (PWM)

·On-chip voltage regulator (VREG) for regulation of input supply and all internal voltages

·Autonomous periodic interrupt (API), supports cyclic wakeup from Stop mode

·Pins to support 25 mA drive strength to VSSX

·Pin to support 20 mA drive strength from VDDX (EVDD)

·High Voltage Input (HVI)

·Supply voltage sense with low battery warning

·On-chip temperature sensor, temperature value can be measured with ADC or can generate a high

temperature warning

·Up to 23 pins can be used as keyboard wake-up interrupt (KWI)

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S12 S/MM9 Microcontroller IC 16-Bit 20MHz 32KB (32K x 8) FLASH 48-HLQFP (7x7)

Integrated S12 Based Relay Driver with LIN

The S/MM912F634 is an integrated single package solution integrating

an HCS12 microcontroller with a SMARTMOS analog control IC. The

Die to Die Interface (D2D) controlled analog die combines system base

chip and application specific functions, including a LIN transceiver.

Features

• 16-Bit S12 CPU, 32 kByte FLASH, 2.0 kByte RAM

• Background debug (BDM) & debug module (DBG)

• Die to die bus interface for transparent memory mapping

• On-chip oscillator & two independent watchdogs

• LIN 2.1 physical layer interface with integrated SCI

• Six digital MCU GPIOs shared with SPI (PA5…0)

• 10-Bit, 15 channel - analog to digital converter (ADC)

• 16-Bit, four channel - timer module (TIM16B4C)

• 8-Bit, two channel - pulse width modulation module (PWM)

• Six high-voltage / wake-up inputs (L5.0)

• Three low-voltage GPIOs (PB2.0)

• Low-power modes with cyclic sense & forced wake-up

• Current sense module with selectable gain

• Reverse battery protected voltage sense module

• Two protected low-side outputs to drive inductive loads

• Two protected high-side outputs

• Chip temperature sensor

• Hall sensor supply

• Integrated voltage regulator(s)

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S12Z S12 MagniV Microcontroller IC 16-Bit 32MHz 192KB (192K x 8) FLASH 48-LQFP (7x7)

Introduction

The MC9S12ZVC-Family is a new member of the S12 MagniV product line integrating a battery level

(12V) voltage regulator, supply voltage monitoring, high voltage inputs and a CAN physical interface. It's

primarily targeting at CAN nodes like sensors, switch panels or small actuators. It offers various

low-power modes and wakeup management to address state of the art power consumption requirements.

Some members of the MC9S12ZVC-Family are also offered for high temperature applications requiring

AEC-Q100 Grade 0 (-40℃ to +150C ambient operating temperature range).

The MC9S12ZVC-Family is based on the enhanced performance, linear address space S12Z core and

delivers an optimized solution with the integration of several key system components into a single device,

optimizing system architecture and achieving significant space savings.

Chip-Level Features

·On-chip modules available within the family include the following features:

·S12Z CPU core

·Up to 192 Kbyte on-chip flash with ECC

·Up to 2 Kbyte EEPROM with ECC

· Up to 12Kbyte on-chip SRAM with ECC

·Phase locked loop (IPLL) frequency multiplier with internal filter

·1MHz internal RC oscillator with +/-1.3% accuracy over rated temperature range

·4-20MHz amplitude controlled pierce oscillator

·Internal COP (watchdog) module

·Analog-to-digital converter (ADC) with 12-bit resolution and up to 16 channels available on

external pins

·Two analog comparators (ACMP) with rail-to-rail inputs

·One 8-bit 5V digital-to-analog converter(DAC)

·Up to two serial peripheral interface (SPI) modules

·Up to two serial communication interface(SCI) modules

·SENT Transmitter Interface

·MSCAN(1 Mbit/s,CAN 2.0 A, B software compatible) module

·One on-chip CAN physical layer module

·8-channel timer module (TIM0) with input capture/output compare

·4-channel timer module (TIM1) with input capture/output compare (fast max 64MHz)

·Inter-IC (IIC) module

·4-channel 16-bit Pulse Width Modulation module (PWM0)

·4-channel 16-bit Pulse Width Modulation module (PWM1) (fast max 64MHz)

·On-chip voltage regulator (VREG) for regulation of input supply and all internal voltages

·Autonomous periodic interrupt (API), supports cyclic wakeup from Stop mode

·Four pins to support 25 mA drive strength to VSSX

·One pin to support20 mA drive strength from VDDX (EVDD)

·Two High Voltage Input (HVI) pins

·Supply Vsup monitoring with warning

·On-chip temperature sensor, temperature value can be measured with ADC or can generate a high

temperature interrupt

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