NXP USA Inc.

CPU12 HC12 Microcontroller IC 16-Bit 8MHz 128KB (128K x 8) FLASH 112-LQFP (20x20)

Introduction

The MC68HC912DT128A microcontroller unit (MCU) is a 16-bit device

composed of standard on-chip peripherals including a 16-bit central

processing unit (CPU12), 128K bytes of flash EEPROM, 8K bytes of

RAM, 2K bytes of EEPROM, two asynchronous serial communications

interfaces (SCI), a serial peripheral interface (SPI), an inter-IC interface

(I2C), an enhanced capture timer (ECT), two 8-channel, 10-bit analogto-digital

converters (ADC), a four-channel pulse-width modulator

(PWM), and three CAN 2.0 A, B software compatible modules

(MSCAN12). System resource mapping, clock generation, interrupt

control and bus interfacing are managed by the lite integration module

(LIM). The MC68HC912DT128A has full 16-bit data paths throughout,

however, the external bus can operate in an 8-bit narrow mode so single

8-bit wide memory can be interfaced for lower cost systems. The

inclusion of a PLL circuit allows power consumption and performance to

be adjusted to suit operational requirements. In addition to the I/O ports

available in each module, 16 I/O ports are available with Key-Wake-Up

capability from STOP or WAIT mode.

Features

• 16-bit CPU12

– Upward compatible with M68HC11 instruction set

– Interrupt stacking and programmer’s model identical to

M68HC11

– 20-bit ALU

– Instruction queue

– Enhanced indexed addressing

• Multiplexed bus

– Single chip or expanded

– 16 address/16 data wide or 16 address/8 data narrow modes

• Memory

– 128K byte flash EEPROM, made of four 32K byte modules

with 8K bytes protected BOOT section in each module

– 2K byte EEPROM

– 8K byte RAM with Vstby, made of two 4K byte modules.

• Two Analog-to-digital converters

– 2 times 8-channels, 10-bit resolution

• Three 1M bit per second, CAN 2.0 A, B software compatible

modules on the MC68HC912DT128A (two on the

MC68HC912DG128A)

– Two receive and three transmit buffers per CAN

– Flexible identifier filter programmable as 2 x 32 bit, 4 x 16 bit or

8 x 8 bit

– Four separate interrupt channels for Rx, Tx, error and wake-up

per CAN

– Low-pass filter wake-up function

– Loop-back for self test operation

– Programmable link to a timer input capture channel, for timestamping

and network synchronization.

• Enhanced capture timer (ECT)

– 16-bit main counter with 7-bit prescaler

– 8 programmable input capture or output compare channels; 4

of the 8 input captures with buffer

– Input capture filters and buffers, three successive captures on

four channels, or two captures on four channels with a

capture/compare selectable on the remaining four

– Four 8-bit or two 16-bit pulse accumulators

– 16-bit modulus down-counter with 4-bit prescaler

– Four user-selectable delay counters for signal filtering

• 4 PWM channels with programmable period and duty cycle

– 8-bit 4-channel or 16-bit 2-channel

– Separate control for each pulse width and duty cycle

– Center- or left-aligned outputs

– Programmable clock select logic with a wide range of

frequencies

• Serial interfaces

– Two asynchronous serial communications interfaces (SCI)

– Inter IC bus interface (I2C)

– Synchronous serial peripheral interface (SPI)

• LIM (lite integration module)

– WCR (windowed COP watchdog, real time interrupt, clock

monitor)

– ROC (reset and clocks)

– MEBI (multiplexed external bus interface)

– MMI (memory map and interface)

– INT (interrupt control)

– BKP (breakpoints)

– BDM (background debug mode)

• Two 8-bit ports with key wake-up interrupt

• Clock generation

– Phase-locked loop clock frequency multiplier

– Limp home mode in absence of external clock

– Slow mode divider

– Low power 0.5 to 16 MHz crystal oscillator reference clock

– Option of a Pierce or Colpitts oscillator

• 112-Pin TQFP package

– Up to 67 general-purpose I/O lines on the

MC68HC912DT128A (up to 69 on the MC68HC912DG128A),

plus up to 18 input-only lines

– 5.0V operation at 8 MHz

• Development support

– Single-wire background debug™ mode (BDM)

– On-chip hardware breakpoints

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12V1 HCS12 Microcontroller IC 16-Bit 25MHz 32KB (32K x 8) FLASH 48-LQFP (7x7)

Introduction

The MC9S12G-Family is an optimized, automotive, 16-bit microcontroller product line focused on

low-cost, high-performance, and low pin-count. This family is intended to bridge between high-end 8-bit

microcontrollers and high-performance 16-bit microcontrollers, such as the MC9S12XS-Family. The

MC9S12G-Family is targeted at generic automotive applications requiring CAN or LIN/J2602

communication. Typical examples of these applications include body controllers, occupant detection, door

modules, seat controllers, RKE receivers, smart actuators, lighting modules, and smart junction boxes.

The MC9S12G-Family uses many of the same features found on the MC9S12XS- and MC9S12P-Family,

including error correction code (ECC) on flash memory, a fast analog-to-digital converter (ADC) and a

frequency modulated phase locked loop (IPLL) that improves the EMC performance. 

The MC9S12G-Family is optimized for lower program memory sizes down to 16k. In order to simplify

customer use it features an EEPROM with a small 4 bytes erase sector size.

The MC9S12G-Family deliver all the advantages and efficiencies of a 16-bit MCU while retaining the low

cost, power consumption, EMC, and code-size efficiency advantages currently enjoyed by users of NXP’s

existing 8-bit and 16-bit MCU families. Like the MC9S12XS-Family, the MC9S12G-Family run 16-bit

wide accesses without wait states for all peripherals and memories. The MC9S12G-Family is available in

100-pin LQFP, 64-pin LQFP, 48-pin LQFP/QFN, 32-pin LQFP and 20-pin TSSOP package options and

aims to maximize the amount of functionality especially for the lower pin count packages. In addition to

the I/O ports available in each module, further I/O ports are available with interrupt capability allowing

wake-up from stop or wait modes.

Chip-Level Features

On-chip modules available within the family include the following features:

• S12 CPU core

• Up to 240 Kbyte on-chip flash with ECC

• Up to 4 Kbyte EEPROM with ECC

• Up to 11 Kbyte on-chip SRAM

• Phase locked loop (IPLL) frequency multiplier with internal filter

• 4–16 MHz amplitude controlled Pierce oscillator

• 1 MHz internal RC oscillator

• Timer module (TIM) supporting up to eight channels that provide a range of 16-bit input capture,

output compare, counter, and pulse accumulator functions

• Pulse width modulation (PWM) module with up to eight x 8-bit channels

• Up to 16-channel, 10 or 12-bit resolution successive approximation analog-to-digital converter

(ADC)

• Up to two 8-bit digital-to-analog converters (DAC)

• Up to one 5V analog comparator (ACMP)

• Up to three serial peripheral interface (SPI) modules

• Up to three serial communication interface (SCI) modules supporting LIN communications

• Up to one multi-scalable controller area network (MSCAN) module (supporting CAN protocol

2.0A/B)

• On-chip voltage regulator (VREG) for regulation of input supply and all internal voltages

• Autonomous periodic interrupt (API)

• Precision fixed voltage reference for ADC conversions

• Optional reference voltage attenuator module to increase ADC accuracy

S12Z S12 MagniV Microcontroller IC 16-Bit 32MHz 128KB (128K x 8) FLASH 48-LQFP (7x7)

Introduction

The MC9S12ZVC-Family is a new member of the S12 MagniV product line integrating a battery level

(12V) voltage regulator, supply voltage monitoring, high voltage inputs and a CAN physical interface. It's

primarily targeting at CAN nodes like sensors, switch panels or small actuators. It offers various

low-power modes and wakeup management to address state of the art power consumption requirements.

Some members of the MC9S12ZVC-Family are also offered for high temperature applications requiring

AEC-Q100 Grade 0 (-40℃ to +150C ambient operating temperature range).

The MC9S12ZVC-Family is based on the enhanced performance, linear address space S12Z core and

delivers an optimized solution with the integration of severalkey system components into a single device,

optimizing system architecture and achieving significant space savings.

Chip-Level Features

·On-chip modules available within the family include the following features:

·S12Z CPU core

·Up to 192 Kbyte on-chip flash with ECC

·Up to 2 Kbyte EEPROM with ECC

·Up to 12Kbyte on-chip SRAM with ECC

·Phase locked loop (IPLL) frequency multiplier with internal filter

·1 MHz internal RC oscillator with +/-1.3% accuracy over rated temperature range

·4-20MHz amplitude controlled pierce oscillator

·Internal COP (watchdog) module

·Analog-to-digital converter (ADC) with 12-bit resolution and up to 16 channels available on

external pins

·Two analog comparators (ACMP) with rail-to-rail inputs

·One 8-bit 5V digital-to-analog converter (DAC)

·Up to two serial peripheral interface (SPI) modules

·Up to two serial communication interface (SCI) modules

·SENT Transmitter Interface

·MSCAN(1 Mbit/s,CAN 2.0 A, B software compatible) module

·One on-chip CAN physical layer module

·8-channel timer module (TIM0) with input capture/output compare

·4-channel timer module (TIM1) with input capture/output compare (fast max 64MHz)

·Inter-IC (IIC) module

·4-channel 16-bit Pulse Width Modulation module (PWM0)

·4-channel 16-bit Pulse Width Modulation module (PWM1) (fast max 64MHz)

·On-chip voltage regulator (VREG) for regulation of input supply and all internal voltages

·Autonomous periodic interrupt (API), supports cyclic wakeup from Stop mode

·Four pins to support 25 mA drive strength to VSSX

·One pin to support 20mA drive strength fromVDDX (EVDD)

·Two High Voltage Input (HVI) pins

·Supply Vsup monitoring with warning

·On-chip temperature sensor, temperature value can be measured with ADC or can generate a high

temperature interrupt

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S12Z S12 MagniV Microcontroller IC 16-bit 32MHz 96KB(96K x 8) Flash 64-LQFP(10x10)

Introduction

The MC9S12ZVC-Family is a new member of the S12 MagniV product line integrating a battery level

(12V) voltage regulator, supply voltage monitoring, high voltage inputs and aCAN physical interface. It's

primarily targeting at CAN nodes like sensors, switch panels or small actuators. It offers various

low-power modes and wakeup management to address state of the art power consumption requirements.

Some members of the MC9S12ZVC-Family are also offered for high temperature applications requiring

AEC-Q100 Grade 0 (-40°℃ to +150C ambient operating temperature range).

The MC9S12ZVC-Family is based on the enhanced performance, linear address space S12Z core and

delivers an optimized solution with the integration of several key system components into a single device,

optimizing system architecture and achieving significant space savings.

Chip-Level Features

•On-chip modules available within the family include the following features:

•S12Z CPU core

•Up to 192 Kbyte on-chip flash with ECC

•Up to 2 Kbyte EEPROM with ECC

•Up to 12Kbyte on-chip SRAM with ECC

•Phase locked loop (IPLL) frequency multiplier with internal filter

•1 MHz interna1RC oscillator with +/-1.3% accuracy over rated temperature range

•4-20MHz amplitude controlled pierce oscillator

•Internal COP (watchdog) module

•Analog-to-digital converter (ADC) with 12-bit resolution and up to 16 channels available on

external pins

•Two analog comparators (ACMP) with rail-to-rail inputs

•One 8-bit 5V digital-to-analog converter (DAC)

•Up to two serial peripheral interface (SPI) modules

•Up to two serial communication interface(SCI) modules

•SENT Transmitter Interface

•MSCAN(1 Mbit/s,CAN 2.0 A, B software compatible) module

•One on-chip CAN physical layer module

•8-channel timer module (TIM0) with input capture/output compare

•4-channel timer module (TIM1) with input capture/output compare (fast max 64MHz)

•Inter-IC (IIC) module

•4-channel 16-bit Pulse Width Modulation module (PWM0)

•4-channe1 16-bit Pulse Width Modulation module (PWM1) (fast max 64MHz)

•On-chip voltage regulator (VREG) for regulation of input supply and all internal voltages

•Autonomous periodic interrupt (API), supports cyclic wakeup from Stop mode

•Four pins to support 25 mA drive strength to VSSX

•One pin to support 20 mA drive strength from VDDX (EVDD)

•Two High Voltage Input(HVI) pins

•Supply Vsup monitoring with warning

•On-chip temperature sensor, temperature value can be measured with ADC or can generate a high

temperature interrupt

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