NXP USA Inc.

S12Z S12 MagniV Microcontroller IC 16-Bit 32MHz 128KB (128K x 8) FLASH 144-LQFP (20x20)

Introduction

The MC9S12ZVH-Family is an optimized automotive 16-bit microcontroller product line focused on low-

cost, high-performance and application component countreduction. This family integrates the components

of an S12HY or S12XHY-family microcontroller with a CAN Physical interface, a 5V regulator system to

supply the microcontroller and other components. The MC9S12ZVH-Family is targeted at automotive &

motorcycle instrument cluster applications requiring CAN connectivity, stepper motor gauges, and

segment LCD displays.

The MC9S12ZVH-Family features a 4x40 liquid crystal display (LCD) controller/driver and a pulse

width modulated motor controller (MC) consisting of up to 16 high current outputs. The device is capable

of stepper motor stall detection (SSD) via hardware or software, please contact Freescale sales office for

detailed information on software SSD.

The MC9S12ZVH-Family delivers an optimized solution with the integration of several key system

components into a single device, optimizing system architecture and achieving significant PCBspace

savings. The MC9S12ZVH-Family delivers all the advantages and efficiencies of a 16-bit MCU while

retaining the low cost, power consumption, EMC, and code-size efficiency advantages currently enjoyed

by users of Freescale's existing 8-bit and 16-bit MCU families. The MC9S12ZVH-Family also features

the revolutionary S12Z CPU with code size & execution efficiencies even higher than our class leading

S12X CPU. This also provides a linear memory map for flash memory for all members of the family,

eliminating the awkwardness and performance impact of page swapping. In addition to the I/O ports

available in each module, further I/O ports are available with interrupt capability allowing wake-up from

stop or wait modes.

Chip-Level Features

On-chip modules available within the family include the following features:

•S12Z CPU core

•128 or 64 KB on-chip flash with ECC

•4 KB EEPROM with ECC

•8 or 4 KB on-chip SRAM with ECC

•Phase locked loop (IPLL) frequency multiplier with internal filter

•1 MHz internal RC oscillator with +/-1.3% accuracy over rated temperature range

•4-20 MHz amplitude controlled pierce oscillator

•32 KHz oscillator forRTC and LCD

•Internal COP(watchdog) module

•LCD driver for segment LCD with 40 frontplanes x 4 backplanes

•Stepper Motor Controller with drivers for up to 4 motors

•Up to 4 Stepper Stall Detector (SSD) modules (one for each motor)

•Real Time Clock (RTC) support the Hour/Minute/Second function and frequency compensation

•One Analog-to-Digital Converters (ADC) with 10-bit resolution and up to 8 channels available on

external pins

•Two Timer module (TIM) supporting input/output channels that provide a range of 16-bit input

capture & output compare (8 channels)

•One Pulse Width Modulation (PWM) modules with up to 8 x 8-bit channels

•Simple Sound Generation (SSG) for monotonic tone generation

•One Inter-Integrated Circuit (IIC) module

•One Serial Peripheral Interface (SPI) module

•Two Serial Communication Interface (SCI) module supporting LIN 1.3, 2.0, 2.1 and SAE J2602

communications

•Up to one on-chip high-speed CAN physical layer transceiver

•One MSCAN (up to 1 Mbp/s, CAN 2.0 A, B compliant) module

•On-chip Voltage Regulator (VREG) for regulation of input supply and all internal voltages

•Optional VREG ballast control output to supply an external or internal CAN physical layer

•Autonomous Periodic Interrupt (API) (combination with cyclic, watchdog)

•Supply voltage sense with low battery warning.

•Chip temperature sensor

HCS12 HCS12 Microcontroller IC 16-Bit 16MHz 128KB (128K x 8) FLASH 48-LQFP (7x7)

Introduction

The MC9S12Q128-Family is a 48/52/80 pin Flash-based MCU family, which delivers the power and

flexibility of the 16 Bit core to a whole new range of cost and space sensitive, general purpose Industrial

and Automotive network applications All MC9S12Q128-Familymembers feature standard on-chip

peripherals including a 16-bit central processing unit (CPU12), up to 128K bytes of Flash EEPROM (or

ROM), up to 4K bytes of RAM, an asynchronous serial communications interface (SCI), a serial peripheral

interface (SPI), a 6-channel 16-bit timermodule (TIM), a 4-channel 8-bit pulse width modulator (PWM),

an 8-channel, 10-bit analog-to-digital converter (ADC).

All MC9S12Q128-Family devices feature full 16-bit data paths throughout. The inclusion of a PLL circuit

allows power consumption and performance to be adjusted to suit operational requirements. In addition to

the I/O ports available in each module, up to 10 dedicated I/O port bits are available with wake-up

capability from stop or wait mode. The MC9S12Q128-Family devices are available in 48-, 52-, and 80-pin

QFP packages, with the 80-pin version pin compatible to the HCS12 A, B,, C and D Family derivatives.

Features

• 16-bit HCS12 core:

— HCS12 CPU

– Upward compatible with M68HC11 instruction set

– Interrupt stacking and programmer’s model identical to M68HC11

– Instruction queue

– Enhanced indexed addressing

— MMC (memory map and interface)

— INT (interrupt control)

— BDM (background debug mode)

— DBG12 (enhanced debug12 module, including breakpoints and change-of-flow trace buffer)

— MEBI (multiplexed expansion bus interface) available only in 80-pin package version

• Wake-up interrupt inputs:

— Up to 12 port bits available for wake up interrupt function with digital filtering

• Memory options:

— 32Kbyte ROM or Flash EEPROM (erasable in 512-byte sectors)

64K, 96K, or 128Kbyte ROM or Flash EEPROM (erasable in 1024-byte sectors)

— 1K, 2K, 3K or 4K Byte RAM

• Analog-to-digital converters:

— One 8-channel module with 10-bit resolution

— External conversion trigger capability

— One 1M bit per second, CAN 2.0 A, B software compatible module

— Five receive and three transmit buffers

— Flexible identifier filter programmable as 2 x 32 bit, 4 x 16 bit, or 8 x 8 bit

— Four separate interrupt channels for Rx, Tx, error, and wake-up

— Low-pass filter wake-up function

— Loop-back for self test operation

• Timer module (TIM):

— 6-Channel timer

— Each channel configurable as either input capture or output compare

— Simple PWM mode

— Modulo reset of timer counter

— 16-bit pulse accumulator

— External event counting

— Gated time accumulation

• PWM module:

— Programmable period and duty cycle

— 8-bit 4-channel or 16-bit 2-channel

— Separate control for each pulse width and duty cycle

— Center-aligned or left-aligned outputs

— Programmable clock select logic with a wide range of frequencies

— Fast emergency shutdown input

• Serial interfaces:

— One asynchronous serial communications interface (SCI)

— One synchronous serial peripheral interface (SPI)

• CRG (clock reset generator module)

— Windowed COP watchdog

— Real time interrupt

— Clock monitor

— Pierce or low current Colpitts oscillator

— Phase-locked loop clock frequency multiplier

— Limp home mode in absence of external clock

— Low power 0.5MHz to 16MHz crystal oscillator reference clock

• :Operating frequency

— 16MHz equivalent to 8MHz Bus Speed for single chip

— 16MHz equivalent to 8MHz Bus Speed in expanded bus modes

— Option of 32 MHz equivalent to 16MHz Bus Speed

• Internal 2.5V regulator:

— Supports an input voltage range from 2.97V to 5.5V

— Low power mode capability

— Includes low voltage reset (LVR) circuitry

— Includes low voltage interrupt (LVI) circuitry

• 48-pin LQFP, 52-pin LQFP, or 80-pin QFP package:

— Up to 58 I/O lines with 5V input and drive capability (80-pin package)

— Up to 2 dedicated 5V input only lines (IRQ, XIRQ)

— 5V 8 A/D converter inputs and 5V I/O

• Development support:

— Single-wire background debug™ mode (BDM)

— On-chip hardware breakpoints

— Enhanced DBG12 debug features

S12Z S12 MagniV Microcontroller IC 16-Bit 32MHz 96KB (96K x 8) FLASH 32-LQFP (7x7)

Introduction

The MC9S12ZVL-Family is an automotive 16-bit microcontroller family using the180nm NVM+UHV

technology that offers the capability to integrate 40V analog components. This family reuses many

features from the existing S12 portfolio. The particular differentiating features of this family are the

enhanced S12Z core and the integration of “high-voltage”analog modules, including the voltage regulator

(VREG) and a Local Interconnect Network (LIN) physical layer.

The MC9S12ZVL-Family includes error correction code (ECC) on RAM, FLASH and EEPROM for

diagnostic or data storage, a fast analog-to-digital converter (ADC) and a frequency modulated phase

locked loop (IPLL) that improves the EMC performance. The MC9S12ZVL-Family delivers an optimized

solution with the integration of several key system components into a single device, optimizing system

architecture and achieving significant space savings. TheMC9S12ZVL-Family delivers all the advantages

and efficiencies of a 16-bit MCU while retaining the low cost, power consumption, EMC, and code-size

efficieney advantages currently enjoyed by users of existing S12 families. The MC9S12ZVL-Family is

available in 48-pin, 32-pin LQFP and 32-pin QFN-EP. In addition to the I/O ports available in each

module, further I/O ports are available with interrupt capability allowing wake-up from stop or wait

modes.

The MC9S12ZVL-Family is a general-purpose family of devices suitable for a wide range of applications.

The MC9S12ZVL-Family is targeted at generic automotive applications requiring LIN connectivity.

Typical examples of these applications include switch panels and body endpoints for sensors.

Chip-Level Features

On-chip modules available within the family include the following features:

·S12Z CPU core

·128, 96, 64, 32, 16 or 8 KB on-chip flash with ECC

·2048,1024,128 byte EEPROM with ECC

·8192,4096, 1024 or 512 byte on-chip SRAM with ECC

·Phase locked loop (IPLL) frequency multiplier with internal filter

·1 MHz internal RC oscillator with +/-1.3% accuracy over rated temperature range

·4-20MHz amplitude controlled pierce oscillator

·Internal COP (watchdog) module

·analog-to-digital converter (ADC) with 10-bit or 12-bit resolution and up to 10 channels available

on external pins and Vbg (bandgap) result reference

·PGA module with two input channels

·One 8-bit 5V digital-to-analog converter (DAC)

·One analog comparators (ACMP) with rail-to-rail inputs

·MSCAN(1Mbit/s, CAN2.0 A, B software compatible) module

·One serial peripheral interface (SPI) module

·One serial communication interface (SCI) module with interface to internal LIN physical layer

transceiver (with RX connected to a timer channel for frequency calibration purposes, if desired)

·Up to one additional SCI (not connected to LIN physical layer)

·One on-chip LIN physical layer transceiver fully compliant with the LIN 2.2 standard

·6-channel timer module (TIM0) with input capture/output compare

·2-channel timer module (TIM1) with input capture/output compare

·Inter-IC (IIC) module

·8-channel Pulse Width Modulation module (PWM)

·On-chip voltage regulator (VREG) for regulation of input supply and all internal voltages

·Autonomous periodic interrupt (API), supports cyclic wakeup from Stop mode

·Pins to support 25mA drive strength to VSSX

·Pin to support 20mA drive strength from VDDX (EVDD)

·High Voltage Input (HVI)

·Supply voltage sense with low battery warning

·On-chip temperature sensor, temperature value can be measured with ADC or can generate a high

temperature warning

· Up to 23 pins can be used as keyboard wake-up interrupt (KWI)