A Comprehensive Guide To MC56F8135VFGE Microcontroller IC 16-Bit 40MHz 64KB (32K x 16) FLASH 128-LQFP (14x20)

56800E 56F8xxx Microcontroller IC 16-Bit 40MHz 64KB (32K x 16) FLASH 128-LQFP (14x20)

Overview

Freescale Semiconductor's digital signal controllers (DSC) combine the ease-of-programming provided

by a microcontroller unit (MCU) with the signal processing power and efficiency of a digital signal

processor (DSP). The microprocessor-style programming model and optimized instruction set

allow straightforward generation of efficient, compact code for both DSP and MCU applications.

The 56F8100 and 56F8300 series are based on the 56800E digital signal controller core that utilizes

a Harvard architecture consisting of three execution units operating in parallel, allowing as many as six

operations per instruction cycle. From the broad portfolio of pin-compatible components with various

combinations of peripheral modules, memory densities and clock speeds, system designers will

find an ideal component to create their product.

The 56F8100 series was developed for price-sensitive industrial and consumer applications.

Devices in the series are ideal for applications requiring intensive computation (for example,

advanced motor control while handling incoming data). Industrial scenarios include digital power

conversion, three-phase motor control, power monitoring and building control. Consumer

applications include electric lawn equipment or exercise equipment such as a treadmill.

The 56F8100 series includes 40 MIPS processing power, on-chip flash memory and a full assortment 

of analog and digital peripherals. For applications that require more performance, features, controller

area network (CAN) connectivity or an extended temperature range, Freescale also offers the

pin-compatible 56F8300 series.

56800E Core Features

> Up to 40 MIPS at a guaranteed 40 MHz core frequency

> DSP and MCU functionality in a unified, C-efficient architecture

> JTAG/enhanced on-chip emulation (EOnCE™) for unobtrusive,

real-time debugging

> Four 36-bit accumulators

> 16- and 32-bit bidirectional barrel shifter

> Parallel instruction set with unique addressing modes

> Hardware DO and REP loops available

> Three internal address buses

> Four internal data buses

> Architectural support for 8-, 16- and 32-bit single-cycle data fetches

> MCU-style software stack support

> Controller-style addressing modes and instructions

> Single-cycle 16 x 16-bit parallel multiplier-accumulator (MAC)

> Proven to deliver more control functionality with a smaller memory

footprint than competing architectures

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