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    Rfq
    UJA1079ATW/5V0/WDJ
    Automotive Interface 32-HTSSOP
    1815
    32-TSSOP (0.240", 6.10mm Width) Exposed Pad
    LS2048AXN7V1B
    ARM® Cortex®-A72 Microprocessor IC QorIQ® Layerscape 4 Core, 64-Bit 2.0GHz 1292-FCPBGA (37.5x37.5)
    8145
    1292-BFBGA, FCBGA
    TDA18250HN/C1
    IC DGTL CABLE SIL TUNER 48HVQFN
    8506
    48-VFQFN Exposed Pad
    LPC11U36FBD64/401151
    ARM® Cortex®-M0 LPC11Uxx Microcontroller IC 32-Bit Single-Core 50MHz 96KB (96K x 8) FLASH 64-LQFP (10x10)

    How do you identify which pin is pin 1 of an IC integrated circuit chip? |ICONECHIP

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    1697
    64-LQFP
    A Comprehensive Guide To MC9S12DG128CFUE Microcontroller IC 16-Bit 25MHz 128KB (128K x 8) FLASH 80-QFP (14x14)

    HCS12 HCS12 Microcontroller IC 16-Bit 25MHz 128KB (128K x 8) FLASH 80-QFP (14x14)


    MC9S12DT128

    Covers MC9S12DT128E, MC9S12DG128E,

    MC9S12DJ128E, MC9S12DG128, MC9S12DJ128,

    MC9S12DB128, MC9S12A128, SC515846, SC515847,

    SC515848, SC515849, SC101161DT, SC101161DG,

    SC101161DJ, SC102202, SC102203, SC102204,

    SC102205


    Overview

    The MC9S12DT128 microcontroller unit (MCU) is a 16-bit device composed of standard on-chip

    peripherals including a 16-bit central processing unit (HCS12 CPU), 128K bytes of Flash EEPROM, 8K

    bytes of RAM, 2K bytes of EEPROM, two asynchronous serial communications interfaces (SCI), two

    serial peripheral interfaces (SPI), an 8-channel IC/OC enhanced capture timer, two 8-channel, 10-bit

    analog-to-digital converters (ADC), an 8-channel pulse-width modulator (PWM), a digital Byte Data Link

    Controller (BDLC), 29 discrete digital I/O channels (Port A, Port B, Port K and Port E), 20 discrete digital

    I/O lines with interrupt and wakeup capability, three CAN 2.0 A, B software compatible modules

    (MSCAN12), a Byteflight module and an Inter-IC Bus. The MC9S12DT128 has full 16-bit data paths

    throughout. However, the external bus can operate in an 8-bit narrow mode so single 8-bit wide memory

    can be interfaced for lower cost systems. The inclusion of a PLL circuit allows power consumption and

    performance to be adjusted to suit operational requirements.


    Features

    • HCS12 Core

    – 16-bit HCS12 CPU

    i. Upward compatible with M68HC11 instruction set

    ii. Interrupt stacking and programmer’s model identical to M68HC11

    iii.20-bit ALU

    iv. Instruction queue

    v. Enhanced indexed addressing

    – MEBI (Multiplexed External Bus Interface)

    – MMC (Module Mapping Control)

    – INT (Interrupt control)

    – BKP (Breakpoints)

    – BDM (Background Debug Module)

    • CRG (Clock and Reset Generator)

    – Choice of low current Colpitts oscillator or standard Pierce Oscillator

    – PLL

    – COP watchdog

    – real time interrupt

    – clock monitor

    • 8-bit and 4-bit ports with interrupt functionality

    – Digital filtering

    – Programmable rising or falling edge trigger

    • Memory

    – 128K Flash EEPROM

    – 2K byte EEPROM

    – 8K byte RAM

    • Two 8-channel Analog-to-Digital Converters

    – 10-bit resolution

    – External conversion trigger capability

    • Three 1M bit per second, CAN 2.0 A, B software compatible modules

    – Five receive and three transmit buffers

    – Flexible identifier filter programmable as 2 x 32 bit, 4 x 16 bit or 8 x 8 bit

    – Four separate interrupt channels for Rx, Tx, error and wake-up

    – Low-pass filter wake-up function

    – Loop-back for self test operation

    • Enhanced Capture Timer

    – 16-bit main counter with 7-bit prescaler

    – 8 programmable input capture or output compare channels

    – Four 8-bit or two 16-bit pulse accumulators

    • 8 PWM channels

    – Programmable period and duty cycle

    – 8-bit 8-channel or 16-bit 4-channel

    – Separate control for each pulse width and duty cycle

    – Center-aligned or left-aligned outputs

    – Programmable clock select logic with a wide range of frequencies

    – Fast emergency shutdown input

    – Usable as interrupt inputs

    • Serial interfaces

    – Two asynchronous Serial Communications Interfaces (SCI)

    – Two Synchronous Serial Peripheral Interface (SPI)

    – Byteflight

    • Byte Data Link Controller (BDLC)

    • SAE J1850 Class B Data Communications Network Interface

    – Compatible and ISO Compatible for Low-Speed (<125 Kbps) Serial Data Communications in

    Automotive Applications

    • Inter-IC Bus (IIC)

    – Compatible with I2C Bus standard

    – Multi-master operation

    – Software programmable for one of 256 different serial clock frequencies

    • 112-Pin LQFP and 80-Pin QFP package options

    – I/O lines with 5V input and drive capability

    – 5V A/D converter inputs

    – Operation at 50MHz equivalent to 25MHz Bus Speed

    – Development support

    – Single-wire background debug™ mode

    – On-chip hardware breakpoints



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    S12Z S12 MagniV Microcontroller IC 16-Bit 32MHz 32KB (32K x 8) FLASH 32-LQFP (7x7)


    Introduction

    The MC9S12ZVM-Family is an automotive 16-bit microcontroller family using the NVM + UHV

    technology that offers the capability to integrate 40 V analog components. This family reuses many

    features from the existing S12/S12X portfolio. The particular differentiating features of this family are the

    enhanced S12Z core, the combination of dual-ADC synchronized with PWM generation and the

    integration of “high-voltage” analog modules, including the voltage regulator (VREG), Gate Drive Unit

    (GDU) and a Local Interconnect Network (LIN) physical layer. These features enable a fully integrated

    single chip solution to drive up to 6 external power MOSFETs for BLDC or PMSM motor drive

    applications.

    The MC9S12ZVM-Family includes error correction code (ECC) on RAM and flash memory, EEPROM

    for diagnostic or data storage, a fast analog-to-digital converter (ADC) and a frequency modulated phase

    locked loop (IPLL) that improves the EMC performance. The MC9S12ZVM-Family delivers an

    optimized solution with the integration of several key system components into a single device, optimizing

    system architecture and achieving significant space savings. The MC9S12ZVM-Family delivers all the

    advantages and efficiencies of a 16-bit MCU while retaining the low cost, power consumption, EMC, and

    code-size efficiency advantages currently enjoyed by users of existing S12(X) families. The

    MC9S12ZVM-Family is available in different pin-out options, using the 64-pin LQFP-EP and 48-pin

    LQFP-EP packages to accommodate LIN, CAN and external PWM based application interfaces. In

    addition to the I/O ports available in each module, further I/O ports are available with interrupt capability

    allowing wake-up from stop or wait modes.

    The MC9S12ZVM-Family is a general-purpose family of devices suitable for a range of applications,

    including:

    • 3-phase sensorless BLDC motor control for

    — Fuel pump

    — Water pump

    — Oil pump

    — A/C compressor

    — HVAC blower

    — Engine cooling fan

    — Electric vehicle battery cooling fan

    • Brush DC motor control requiring driving in 2 directions, along with PWM control for

    — Reversible wiper

    — Trunk opener


    Chip-Level Features

    On-chip modules available within the family include the following features:

    • S12Z CPU core

    • 128, 64, 32 or 16KB on-chip flash with ECC

    • 512 or128 byte EEPROM with ECC

    • 8, 4 or 2 KB on-chip SRAM with ECC

    • Phase locked loop (IPLL) frequency multiplier with internal filter

    • 1 MHz internal RC oscillator with +/-1.3% accuracy over rated temperature range

    • 4-20MHz amplitude controlled pierce oscillator

    • Internal COP (watchdog) module

    • 6-channel, 15-bit pulse width modulator with fault protection (PMF)

    • Low side and high side FET pre-drivers for each phase

    — Gate drive pre-regulator

    — LDO (Low Dropout Voltage Regulator) (typically 11V)

    — High side gate supply generated using bootstrap circuit with external diode and capacitor

    — Sustaining charge pump with two external capacitors and diodes

    — High side drain (HD) monitoring on internal ADC channel using HD/5 voltage

    • Two parallel analog-to-digital converters (ADC) with 12-bit resolution and up to 9 channels

    available on external pins

    • Programmable Trigger Unit (PTU) for synchronization of PMF and ADC

    • One serial peripheral interface (SPI) module

    • One serial communication interface (SCI) module with interface to internal LIN physical layer

    transceiver (with RX connected to a timer channel for frequency calibration purposes, if desired)

    • Up to one additional SCI (not connected to LIN physical layer)

    • On-chip LIN physical layer transceiver fully compliant with the LIN 2.2 standard

    (S12ZVML versions)

    • One High Voltage physical interface. (S12ZVM32, S12ZVM16 versions only)

    • 4-channel timer module (TIM) with input capture/output compare

    • MSCAN (1 Mbit/s, CAN 2.0 A, B software compatible) module

    • On-chip voltage regulator (VREG) for regulation of input supply and all internal voltages

    — Optional VREG ballast control output to supply an external CAN physical layer

    • Two current sense circuits for overcurrent detection or torque measurement

    • Autonomous periodic interrupt (API)

    • 20mA high-current output for use as Hall sensor supply

    • Supply voltage sense with low battery warning

    • Chip temperature sensor


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    15
    8-SOIC (0.154
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    A Comprehensive Guide To MC9S12C32VFUE16 Microcontroller IC 16-Bit 16MHz 32KB (32K x 8) FLASH 80-QFP (14x14)

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    Introduction

    The MC9S12C-Family / MC9S12GC-Family are 48/52/80 pin Flash-based MCU families, which deliver

    the power and flexibility of the 16-bit core to a whole new range of cost and space sensitive, general

    purpose industrial and automotive network applications. All MC9S12C-Family / MC9S12GC-Family

    members feature standard on-chip peripherals including a 16-bit central processing unit (CPU12), up to

    128K bytes of Flash EEPROM, up to 4K bytes of RAM, an asynchronous serial communications interface

    (SCI), a serial peripheral interface (SPI), an 8-channel 16-bit timer module (TIM), a 6-channel 8-bit pulse

    width modulator (PWM), an 8-channel, 10-bit analog-to-digital converter (ADC).

    The MC9S12C128-Family members also feature a CAN 2.0 A, B software compatible module

    (MSCAN12).

    All MC9S12C-Family / MC9S12GC-Family devices feature full 16-bit data paths throughout. The

    inclusion of a PLL circuit allows power consumption and performance to be adjusted to suit operational

    requirements. In addition to the I/O ports available in each module, up to 10 dedicated I/O port bits are

    available with wake-up capability from stop or wait mode. The devices are available in 48-, 52-, and 80-

    pin QFP packages, with the 80-pin version pin compatible to the HCS12 A, B, and D Family derivatives.


    Features

    • 16-bit HCS12 core:

    — HCS12 CPU

    – Upward compatible with M68HC11 instruction set

    – Interrupt stacking and programmer’s model identical to M68HC11

    – Instruction queue

    – Enhanced indexed addressing

    — MMC (memory map and interface)

    — INT (interrupt control)

    — BDM (background debug mode)

    — DBG12 (enhanced debug12 module, including breakpoints and change-of-flow trace buffer)

    — MEBI (multiplexed expansion bus interface) available only in 80-pin package version

    • Wake-up interrupt inputs:

    — Up to 12 port bits available for wake up interrupt function with digital filtering

    • Memory options:

    — 16K or 32Kbyte Flash EEPROM (erasable in 512-byte sectors)

    64K, 96K, or 128Kbyte Flash EEPROM (erasable in 1024-byte sectors)

    — 1K, 2K or 4K Byte RAM

    • Analog-to-digital converters:

    — One 8-channel module with 10-bit resolution

    — External conversion trigger capability

    • Available on MC9S12C Family:

    — One 1M bit per second, CAN 2.0 A, B software compatible module

    — Five receive and three transmit buffers

    — Flexible identifier filter programmable as 2 x 32 bit, 4 x 16 bit, or 8 x 8 bit

    — Four separate interrupt channels for Rx, Tx, error, and wake-up

    — Low-pass filter wake-up function

    — Loop-back for self test operation

    • Timer module (TIM):

    — 8-channel timer

    — Each channel configurable as either input capture or output compare

    — Simple PWM mode

    — Modulo reset of timer counter

    — 16-bit pulse accumulator

    — External event counting

    — Gated time accumulation

    • PWM module:

    — Programmable period and duty cycle

    — 8-bit 6-channel or 16-bit 3-channel

    — Separate control for each pulse width and duty cycle

    — Center-aligned or left-aligned outputs

    — Programmable clock select logic with a wide range of frequencies

    — Fast emergency shutdown input

    • Serial interfaces:

    — One asynchronous serial communications interface (SCI)

    — One synchronous serial peripheral interface (SPI)

    • CRG (clock reset generator module)

    — Windowed COP watchdog

    — Real time interrupt

    — Clock monitor

    — Pierce or low current Colpitts oscillator

    — Phase-locked loop clock frequency multiplier

    — Limp home mode in absence of external clock

    — Low power 0.5MHz to 16MHz crystal oscillator reference clock

    • Operating frequency:

    — 32MHz equivalent to 16MHz bus speed for single chip

    — 32MHz equivalent to 16MHz bus speed in expanded bus modes

    — Option of 9S12C Family: 50MHz equivalent to 25MHz bus speed

    — All 9S12GC Family members allow a 50MHz operating frequency.

    • Internal 2.5V regulator:

    — Supports an input voltage range from 2.97V to 5.5V

    — Low power mode capability

    — Includes low voltage reset (LVR) circuitry

    — Includes low voltage interrupt (LVI) circuitry

    • 48-pin LQFP, 52-pin LQFP, or 80-pin QFP package:

    — Up to 58 I/O lines with 5V input and drive capability (80-pin package)

    — Up to 2 dedicated 5V input only lines (IRQ, XIRQ)

    — 5V 8 A/D converter inputs and 5V I/O

    • Development support:

    — Single-wire background debug™ mode (BDM)

    — On-chip hardware breakpoints

    — Enhanced DBG12 debug features


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    Please send RFQ , we will respond immediately.

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